[X86] isGuaranteedNotToBeUndefOrPoison - add simple target shuffles with known test coverage #161553
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…ith known test coverage Add a number of simple target shuffles (fixed shuffle mask or simple immediate control) to isGuaranteedNotToBeUndefOrPoison/canCreateUndefOrPoisonForTargetNode that have known test coverage and obviously don't introduce undef/poison. These were found by adding an assert for unhandled target shuffles and running over CodeGen/X86 - providing explicit test coverage is incredibly difficult as ISD::VECTOR_SHUFFLE nodes will typically handle freeze nodes before we lower to these target shuffle nodes.
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@llvm/pr-subscribers-backend-x86 Author: Simon Pilgrim (RKSimon) ChangesAdd a number of simple target shuffles (fixed shuffle mask or simple immediate control) to isGuaranteedNotToBeUndefOrPoison/canCreateUndefOrPoisonForTargetNode that have known test coverage and obviously don't introduce undef/poison. These were found by adding an assert for unhandled target shuffles and running over CodeGen/X86 - providing explicit test coverage is incredibly difficult as ISD::VECTOR_SHUFFLE nodes will typically handle freeze nodes before we lower to these target shuffle nodes. Full diff: https://github.com/llvm/llvm-project/pull/161553.diff 1 Files Affected:
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 34854e4d8b6c0..4f8b371651e7e 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -45187,11 +45187,16 @@ bool X86TargetLowering::isGuaranteedNotToBeUndefOrPoisonForTargetNode(
case X86ISD::INSERTPS:
case X86ISD::BLENDI:
case X86ISD::PSHUFB:
+ case X86ISD::VZEXT_MOVL:
case X86ISD::PSHUFD:
+ case X86ISD::PSHUFHW:
+ case X86ISD::PSHUFLW:
+ case X86ISD::SHUFP:
case X86ISD::UNPCKL:
case X86ISD::UNPCKH:
case X86ISD::VPERMILPV:
case X86ISD::VPERMILPI:
+ case X86ISD::VPERMI:
case X86ISD::VPERMV:
case X86ISD::VPERMV3: {
SmallVector<int, 8> Mask;
@@ -45217,6 +45222,16 @@ bool X86TargetLowering::isGuaranteedNotToBeUndefOrPoisonForTargetNode(
}
break;
}
+ case X86ISD::VBROADCAST: {
+ SDValue Src = Op.getOperand(0);
+ MVT SrcVT = Src.getSimpleValueType();
+ if (SrcVT.isVector()) {
+ APInt DemandedSrc = APInt::getOneBitSet(SrcVT.getVectorNumElements(), 0);
+ return DAG.isGuaranteedNotToBeUndefOrPoison(Src, DemandedSrc, PoisonOnly,
+ Depth + 1);
+ }
+ return DAG.isGuaranteedNotToBeUndefOrPoison(Src, PoisonOnly, Depth + 1);
+ }
}
return TargetLowering::isGuaranteedNotToBeUndefOrPoisonForTargetNode(
Op, DemandedElts, DAG, PoisonOnly, Depth);
@@ -45261,13 +45276,19 @@ bool X86TargetLowering::canCreateUndefOrPoisonForTargetNode(
// SSE target shuffles.
case X86ISD::INSERTPS:
case X86ISD::PSHUFB:
+ case X86ISD::VZEXT_MOVL:
case X86ISD::PSHUFD:
+ case X86ISD::PSHUFHW:
+ case X86ISD::PSHUFLW:
+ case X86ISD::SHUFP:
case X86ISD::UNPCKL:
case X86ISD::UNPCKH:
case X86ISD::VPERMILPV:
case X86ISD::VPERMILPI:
+ case X86ISD::VPERMI:
case X86ISD::VPERMV:
case X86ISD::VPERMV3:
+ case X86ISD::VBROADCAST:
return false;
// SSE comparisons handle all icmp/fcmp cases.
// TODO: Add CMPM/MM with test coverage.
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bjope
approved these changes
Nov 6, 2025
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bjope
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Need to say that I'm not that familiar with the details for all these X86ISD nodes. The patch looks good to me, but maybe you want a second opinion from someone more experienced with X86.
vinay-deshmukh
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Nov 8, 2025
…ith known test coverage (llvm#161553) Add a number of simple target shuffles (fixed shuffle mask or simple immediate control) to isGuaranteedNotToBeUndefOrPoison/canCreateUndefOrPoisonForTargetNode that have known test coverage and obviously don't introduce undef/poison. These were found by adding an assert for unhandled target shuffles and running over CodeGen/X86 - providing explicit test coverage is incredibly difficult as ISD::VECTOR_SHUFFLE nodes will typically handle freeze nodes before we lower to these target shuffle nodes.
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Add a number of simple target shuffles (fixed shuffle mask or simple immediate control) to isGuaranteedNotToBeUndefOrPoison/canCreateUndefOrPoisonForTargetNode that have known test coverage and obviously don't introduce undef/poison.
These were found by adding an assert for unhandled target shuffles and running over CodeGen/X86 - providing explicit test coverage is incredibly difficult as ISD::VECTOR_SHUFFLE nodes will typically handle freeze nodes before we lower to these target shuffle nodes.